1. Field of the Invention
The present invention relates to a wiring board structured in such a manner that a frame wiring board having an opening, which surrounds an element mounting portion, is joined to an upper surface of a base wiring board having the element mounting portion in which a semiconductor element is mounted. The present invention also relates to a wiring board having a cavity for housing a semiconductor element therein.
2. Description of Related Art
Amounting semiconductor device is described in Japanese Patent No. 3161706. In the mounting semiconductor device, a semiconductor element is mounted on a substrate. FIGS. 6(a) and 6(b) illustrate a conventional wiring board B structured in such a manner that a base wiring board 130 for mounting a semiconductor element S thereon and a frame wiring board 140 are joined together. The wiring board B has a plurality of product regions X2 and a marginal region Y2 which is integrally formed and disposed to surround each of the product regions X2. A plurality of products are simultaneously manufactured by dicing the wiring board B along lines between the product regions X2 and lines between the product region X2 and the marginal region Y2.
The base wiring board 130 includes an insulating board 121 having a plurality of through holes 122 which penetrates from an upper surface to a lower surface, a wiring conductor layer 123 deposited on the upper and lower surfaces of the insulating board 121 and in the through holes 122, and a solder resist layer 124 deposited on the insulating board 121 and wiring conductor layer 123. The inside of each through hole 122 is filled with hole plugging resin. The wiring conductor layer 123 is formed by, for example, a good conductive material, such as copper foil or copper plating.
An element mounting portion 121a for mounting a semiconductor element S thereon is provided in the upper surface of the base wiring board 130. A plurality of semiconductor element connection pads 125 for electrical connection to electrodes T of the semiconductor element S are formed by a part of the wiring conductor layer 123 in the element mounting portion 121a. The semiconductor element connection pads 125 are exposed in an opening 124a provided in the solder resist layer 124. The semiconductor element S and base wiring board 130 are electrically connected to each other via solder bumps which connect the electrodes T of the semiconductor element S to the semiconductor element connection pads 125.
In the upper surface of the base wiring board 130, a frame-shaped frame joining portion 121b to which the frame wiring board 140 is to be joined is formed in a manner to surround the element mounting portion 121a. A plurality of first joining pads 126 for electrical connection to the frame wiring board 140 are formed by a part of the wiring conductor layer 123 in the frame joining portion 121b. The first joining pads 126 are exposed in an opening 124b provided in the solder resist layer 124. The first joining pads 126 and some of the semiconductor element connection pads 125 are electrically connected to each other. A plurality of external connection pads 127 for connection to an external electric circuit board are formed by a part of the wiring conductor layer 123 in the lower surface of the base wiring board 130. The external connection pads 127 are exposed in an opening 124c provided in the solder resist layer 124. The external connection pads 127 are electrically connected to the semiconductor element connection pads 125 via the through holes 122.
The frame wiring board 140 includes an insulating board 131 having a plurality of through holes 132 which penetrate from an upper surface to a lower surface, a wiring conductor layer 133 deposited on the insulating board 131 and in the through holes 132, and a solder resist layer 134 deposited on the upper and lower surfaces of the insulating board 131. The through holes 132 are filled with hole plugging resin. An opening 135 surrounding the element mounting portion 121a is formed in the frame wiring board 140. A plurality of second joining pads 136 are formed by a part of the wiring conductor layer 133 in the lower surface of the frame wiring board 140, in positions corresponding to the first joining pads 126 of the base wiring board 130. The second joining pads 136 are exposed in an opening 134a provided in the solder resist layer 134. The second joining pads 136 and the first joining pads 126 are joined together via solder bumps H. That is, a part of the wiring conductor layer 123 of the base wiring board 130 is electrically connected to the wiring conductor layer 133 of the frame wiring board 140. A plurality of third joining pads 137 are formed by a part of the wiring conductor layer 133 in the upper surface of the frame wiring board 140. The third joining pads 137 are exposed in the opening 134b provided in the solder resist layer 134. An additional wiring board or a conductive lid is joined to the third joining pads 137 in a manner to cover the opening 135.
In addition, in the frame joining portion 121b, a gap formed between the base wiring board 130 and the frame wiring board 140 is filled with sealing resin 138. The sealing resin 138 firmly joins the base wiring board 130 and the frame wiring board 140 together, and protects the semiconductor element S by preventing moisture and/or a foreign substance, which drifts from a junction where the base wiring board 130 and the frame wiring board 140 are joined to each other, from intruding into the element mounting portion 121a through the gap formed between the base wiring board 130 and the frame wiring board 140.
The following method is employed in order to join the frame wiring board 140 to the upper surface of the base wiring board 130. First, solder for forming the solder bumps H is welded onto at least one of the first joining pads 126 of the base wiring board 130 and the second joining pads 136 of the frame wiring board 140. For solder welding, a method of performing reflow treatment after printing solder paste, or a method of performing reflow treatment after mounting solder balls is used. Next, the frame wiring board 140 is mounted on the base wiring board 130 in such a manner that the first joining pads 126 and the corresponding second joining pads 136 face each other, respectively, and then the solder is reflowed, so that the first joining pads 126 and the second joining pads 136 will be joined together via the solder bumps H. In this case, in the frame joining portion 121b, the gap having a size as large as the height of the solder bump H is formed between the base wiring board 130 and the frame wiring board 140.
Next, in the frame joining portion 121b, liquid sealing resin 138 is injected into the gap formed between the base wiring board 130 and the frame wiring board 140 and then cured. In order to inject the liquid sealing resin 138 into the gap formed between the base wiring board 130 and the frame wiring board 140, the following method is employed: a plurality of resin injection holes 139 are formed in advance in the frame wiring board 140 in a manner to penetrate from the upper surface to the lower surface of the frame wiring board 140; and the sealing resin 138 is injected into the resin injection holes 139 from the upper surface side of the frame wiring board 140.
However, when the liquid sealing resin 138 is injected through this method, in some cases the liquid sealing resin 138 flows out of the frame joining portion 121b, continues to flow along the upper surface of the base wiring board 130, and reaches the element mounting portion 121a. As a result, the semiconductor element connection pads 125 are likely to be covered by the liquid sealing resin 138. For this reason, normal connection between the electrodes T of the semiconductor element S and the semiconductor element connection pads 125 will be inhibited, and the semiconductor element S is unlikely to stably operate.
A waterproof structure of an electronic device is described in Japanese Patent No. 3964555. The electronic device provides a substrate mounted electronic components, which is housed in a case opening at one side. FIG. 7 illustrates a semiconductor element housing wiring board B′ having a cavity 159 for housing a semiconductor element S therein. The semiconductor element housing wiring board B′ mainly includes a base wiring board 150 and a cap wiring board 180. The semiconductor element housing wiring board B′ has a plurality of product regions X2 and a marginal region Y2 which is integrally formed and surrounds each of the product regions X2. A plurality of products are simultaneously manufactured by dicing the semiconductor element housing wiring board B′ along lines between the product regions X2 and lines between the product region X2 and the marginal region Y2.
The base wiring board 150 includes an insulating board 141, a wiring conductor layer 143, and a solder resist layer 144. An element mounting portion 141a is provided in a center portion of an upper surface of each product region X2, and a frame-shaped cap joining portion 141b is provided in a periphery portion of the upper surface of each product region X2 in a manner to surround the corresponding element mounting portion 141a. A description about the insulating board 141, wiring conductor layer 143, and solder resist layer 144 is omitted because they have the same structures and functions as the insulating board 121, wiring conductor layer 123, and solder resist layer 124, respectively.
A plurality of first joining pads 146 for electrical connection to the cap wiring board 180 are formed by a part of the wiring conductor layer 143 in the cap joining portions 141b. The first joining pads 146 are exposed in an opening 144b provided in the solder resist layer 144. The first joining pads 146 and some of the semiconductor element connection pads 145 are electrically connected to each other, respectively. A plurality of external connection pads 147 for connection to an external electric circuit board are formed by a part of the wiring conductor layer 143 in a lower surface of the base wiring board 150. Each external connection pad 147 is exposed in an opening 144c provided in the solder resist layer 144. The external connection pads 147 are electrically connected to the semiconductor element connection pads 145 via the through holes 142.
The cap wiring board 180 is configured in such a manner that a plate-shaped upper wiring board 160 and a frame-shaped frame wiring board 170 are joined together. The upper wiring board 160 includes an insulating board 151, a wiring conductor layer 153, and a solder resist layer 154.
The insulating board 151 is a plate made of, for example, a resin-based insulating material, and has a plurality of through holes 152 penetrating from an upper surface to a lower surface of the insulating board 151. The wiring conductor layer 153 is formed by a good conductive material, such as copper foil or copper plating, for example. The wiring conductor layer 153 is deposited on the upper and lower surfaces of the insulating board 151 and on internal surfaces of the through holes 152 in a manner to have a predetermined pattern. The through holes 152 with the internal surfaces on which the wiring conductor layer 153 is deposited are filled with hole plugging resin. The solder resist layer 154 is formed by a resin-based insulating material and is deposited on the upper and lower surfaces of the insulating board 151, exposing a part of the wiring conductor layer 153.
A plurality of frame connection pads 155 for electrical connection to upper connection pads 165 of the frame wiring board 170 are formed by a part of the wiring conductor layer 153 in a lower surface of the upper wiring board 160. The frame connection pads 155 are exposed in an opening 154a provided in the solder resist layer 154. The upper wiring board 160 and frame wiring board 170 are electrically connected by connecting the upper connection pads 165 and the frame connection pads 155 via solder bumps. A gap formed between the upper wiring board 160 and the frame wiring board 170 is filled with resin. A description about the frame wiring board 170 is omitted because the frame wiring board 170 has the same structure and function as the frame wiring board 140.
The upper connection pads 165 for electrical connection to the frame connection pads 155 are formed by a part of the wiring conductor layer 163 in the upper surface of the frame wiring board 170. The upper connection pads 165 are exposed in an opening 164a provided in the solder resist layer 164. The frame connection pads 155 are connected to the upper connection pads 165 via solder bumps, and the gap formed between them is filled with resin. In this way, the cap wiring board 180 in which the upper wiring board 160 and the frame wiring board 170 are electrically connected to each other is formed. A plurality of resin injection holes 179 are arranged in a position corresponding to the cap joining portion 141b of the cap wiring board 180.
A plurality of second joining pads 166 for electrical connection to the first joining pads 146 are formed by a part of the wiring conductor layer 163 in the lower surface of the frame wiring board 170. The second joining pads 166 are exposed in an opening 164b provided in the solder resist layer 164. In addition, the cap wiring board 180 and the base wiring board 150 are electrically connected by connecting the first joining pads 146 and the second joining pads 166 via solder bumps.
In the cap joining portion 141b, a gap formed between the base wiring board 150 and the cap wiring board 180 is filled with sealing resin 158. The sealing resin 158 firmly joins the base wiring board 150 and the cap wiring board 180 together, and protects the semiconductor element S by preventing moisture and/or a foreign substance, which drifts from a gap in a junction where the base wiring board 150 is joined to the cap wiring board 180, from intruding into the element mounting portion 141a. 
The following method is employed to join the cap wiring board 180 to the upper surface of the base wiring board 150. First, solder for forming solder bumps is welded on at least one of the first joining pads 146 of the base wiring board 150 and the second joining pads 166 of the cap wiring board 180. For solder welding, a method of performing reflow treatment after printing soldering paste, or a method of performing reflow treatment after mounting solder balls is used. Next, the cap wiring board 180 is mounted on the base wiring board 150 in such a manner that the first joining pads 146 and the corresponding second joining pads 166 face each other, respectively, and then the solder is reflowed, so that the first joining pads 146 and the second joining pads 166 will be joined together via the solder bumps. In this case, in the cap joining portion 141b, a gap having a size as large as the height of the solder bumps is formed between the base wiring board 150 and the cap wiring board 180.
Next, in the cap joining portion 141b, liquid sealing resin 158 is injected into the gap formed between the base wiring board 150 and the cap wiring board 180 and then cured. In order to inject the liquid sealing resin 158 into the gap formed between the base wiring board 150 and the cap wiring board 180, the following method is employed: a plurality of resin injection holes 179 are formed to penetrate from the upper surface to the lower surface in the cap wiring board 180; and the sealing resin 158 is injected into the resin injection holes 179 from the upper surface side of the cap wiring board 180.
Some semiconductor elements among the semiconductor elements S mounted on the semiconductor element-mounting wiring board B′ may have a physical operation mechanism (for example micro electro mechanical system (MEMS)) disposed outside thereof. However, when the liquid sealing resin 158 is injected between the base wiring board 150 and the cap wiring board 180 using this injection method, the liquid sealing resin 158 may flow out so as to reach the base wiring board 150 within the cavity 159, and the sealing resin 158 is likely to cover the operation mechanism of the semiconductor element S. For this reason, the operation mechanism may not normally operate and the semiconductor element S is not likely to stably operate.